interrupt of PIN change 是說其它 I/O 腳可以在信號改變時產生中斷。M328有3隻 PCINT0,1,2~
使用時機上是信號的狀況改變，而不是特定信號發生。
INT0/INT1 interrupt only use level trigger.
就是一般常用的外部中斷，可設成 low level trigger or high level trigger
watchdog wake up 就是一種計時器的 wake up ，你可以設定幾秒鐘後自動 wake up ~
可以用來實作成底下類似的系統行為：
1. X86 的 wake up from RTC，設定時間後就會在那個時間醒來。
2. IOS 的推播，機器在睡覺時固定一個時間周期醒來連網收取訊息再睡~
3. intel 的 AOAC, Always On Alway Connected( Smart Connect Technology，ISCT)~ notebook睡覺時還能收信件~
4. 胎壓偵側器，一段時間才醒來檢查胎壓，沒事都在睡覺。
M8 spec:
External Interrupts
The external interrupts are triggered by the INT0, and INT1 pins. Observe that, if enabled, the interrupts
will trigger even if the INT0:1 pins are configured as outputs. This feature provides a way of generating a
software interrupt. The external interrupts can be triggered by a falling or rising edge or a low level. This is
set up as indicated in the specification for the MCU Control Register – MCUCR. When the external
interrupt is enabled and is configured as level triggered, the interrupt will trigger as long as the pin is held
low. Note that recognition of falling or rising edge interrupts on INT0 and INT1 requires the presence of an
I/O clock, described in Clock Systems and their Distribution. Low level interrupts on INT0/INT1 are
detected . This implies that these interrupts can be used for waking the part also from
sleep modes other than Idle mode. The I/O clock is halted in all sleep modes except Idle mode.
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發表於 2016-12-23 15:39:14
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